1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a non-volatile memory device having a 2-T (transistor) FN (fowler-Nordheim) type EEPROM (electrically erasable programmable read-only memory) memory cell.
2. Description of the Related Art
Unlike DRAM or SRAM devices that are erasable when power is not supplied, non-volatile memory devices are not erasable even when the power supply is discontinued. A typical non-volatile memory device is an EEPROM that is electrically programmable and erasable. The EEPROM is used to store permanent codes and is typically programmed in units of bytes and erased in units of blocks or sectors. Recently, flash memories that are erasable in units of bytes have been suggested, where a 2T FN type EEPROM is mainly used for such flash memories.
The 2T FN type EEPROM refers to an EEPROM in which two transistors constitute one memory cell and programming and erasing is performed using an FN tunneling method. The two transistors constituting the memory cell are connected in series, in which one is a FLOTOX (floating gate tunnel oxide) type memory transistor and the other is a selection transistor.
As the memory capacity of the EEPROM device has increased, the size of a unit memory cell has gradually decreased, so that the active width and capacitance of the memory cell has been reduced. As a result, the efficiency in the programming and erasing of the memory cell has been deteriorated. Consequently, as a threshold voltage of an on-cell memory transistor has increased, the affect with respect to the on-cell current has become disadvantageous. The “on-cell,” or an “erased cell,” means a memory cell in which the threshold voltage is lowered, for example, not greater than +1V, as electrons escape from a floating gate of the memory transistor. In contrast, an “off-cell”, or a “programmed cell”, is a memory cell in which the threshold voltage is high, for example, not less than +5V, as electrons are accumulated at the floating gate of the memory transistor.
Once the threshold voltage of the on-cell becomes high, the amount of the on-cell current is decreased. In particular, the threshold voltage Vth of the on-cell increases due to the repeated work of storing and deleting data. Accordingly, as the amount of current of the on-cell decreases, it is difficult to determine whether it is the on-cell or the off-cell. When the determination of the on-cell or off-cell becomes difficult, a read error can occur.
To solve the problem, a process improvement has been implemented to improve the quality of a tunnel oxide in which electrons are tunneled. However, this improvement alone has not completely resolved the problem, since various restrictions in view of the process exist.